CASE STUDY
ABSTRACT
The dominant trend in packaging DDR DRAM for the future is the face down substrate-on-chip configuration. For this type of package it is critical that the die attach method employed provide precise control of bond line thickness and die tilt, minimal fillet, and prevent contamination of the wire
bond pads located on the edge of the center wire bond channel. To date, a film adhesive has been the die attach method of choice because it is well suited to meet those requirements. Unfortunately, films are quite expensive compared to die attach pastes in terms of material, process, and tooling costs. This is especially true when changes such as die shrinks and board redesigns mandate a taping tool change. To address this serious issue, a novel series of printable B-stage adhesives has been developed that deliver the performance of a film (with respect to bond line and flow control), with the low cost of a paste (in terms of tooling and materials). In this paper, we will present data on a commercial series and a developmental series of printable adhesives, which
were developed specifically for substrate-on-chip packages. These proprietary adhesives are formulated to be stencil printed on a substrate and then B-staged. The printed substrates then replace the standard pre-taped substrates that
represent the mainstream in DRAM packaging. Data show that these printable adhesives deliver the performance of films, i.e. low flow and bond-line control on die attach, more than a six month storage life at room temperature, and do not require substrate pre-drying. ChipMOS Technologies has pioneered the assembly process using these adhesives and are seeing high UPH and equivalent reliability performance to film adhesives. Key in-package reliability data from those evaluations will be presented. Key Words: die attach, stencil print, adhesive, packaging
INTRODUCTION
Typically the DDR DRAM packages in the substrate-onchip (SOC) or board-on-chip (BOC) configuration utilize a plastic array type substrate bonded to the active face of the chip1,2. The substrate has a center slot cut out directly underneath the die through which wire bonding is performed to the opposite side of the substrate. A typical SOC package cross-section is shown in Figure 1.
For this type of package, it is critical that the die attach method employed provide precise control of bond line thickness and die tilt, minimal fillet, and prevent contamination of the wire bond pads located on the edge of the center wire bond channel. Typically two adhesive decals are used for die attach. They are rectangular in shape and are placed on either side of the center slot. On the outer perimeter, they may end just inside the die edge, at the die edge, or just beyond the die edge. In any case, it is critical that the adhesive be as close to the slot as possible to prevent a gap from being left after molding. However, the wire bond pads on the substrate are located right at the slot edge on the opposite side of the substrate. This requires both high accuracy in placing the adhesive, and very low controlled flow or filleting during die attach to prevent bond pad contamination. This combination of requirements
necessitates a film type adhesive. Punching accuracy on pre-taping equipment is typically within 50 μm, and film adhesives can be made to flow less than 50 μm during attach, allowing the SOC package requirements to be met. Along with the precise adhesive thickness and flow control a film adhesive provides, films can also offer advantages in UPH and work in process. Generally, film adhesives do not require substrate pre-drying, which eliminates a step from the process which is typically about four hours in length. Also, films are generally pre-attached to the substrate, which makes die bonding a high UPH process. Attach times for films are typically less than 1 sec. per die enabling die bonder UPH in the range of 500-2000. Since the mainstream packaging in DRAM over the last
several years has been the TSOP II package (LOC configuration), the industry’s infrastructure is also well suited to the SOC package using film adhesives, as the process is quite similar and the equipment used can be the same.
Read and download the complete 5-page case study:
Printable Die Attach Adhesives for Substrate On Chip Packaging Case Study.pdf
